Design Engineer building polished developer - tool experiences for WorkOS, which provides enterprise authentication and identity APIs. Prototyping, shipping production UI, and improving the WorkDS design system across products.
About the role
- Senior Staff Analog Design Engineer at SiTime, focusing on advanced clock and timing product development. Leading innovations in MEMS-based Precision Timing technology with cross-functional teams.
Responsibilities
- Provide technical leadership in developing advanced clock and timing products
- Define, design, and develop innovative circuits for high-performance timing products
- Mentor, lead, and guide junior designers
- Collaborate effectively with remote engineering teams
- Support prototype testing, debugging, and lab characterization
- Provide technical support across the full product development cycle through production release
Requirements
- Master’s or PhD degree in Electrical Engineering
- 10+ years of relevant experience in analog/mixed-signal CMOS design
- Strong knowledge of integrated circuit design, device physics, and process technology
- Experience designing PLLs or related building blocks, including VCOs, phase detectors, charge pumps, and similar circuits
- Deep understanding of transistor behavior, circuit noise theory, and phase noise concepts
- Proficiency with the Cadence analog/mixed-signal simulation toolset
- Familiarity with analog/mixed-signal design flow, simulation methods, design rules, post-layout verification
- Experience with analog behavioral modeling using SystemVerilog, Verilog-A, or AMS
- Hands-on experience with lab testing and characterization
Benefits
- Comprehensive and highly competitive compensation package
- Quarterly bonus tied to innovation goals
- Equity grants
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