About the role

Analog/mixed-signal IC designer developing high-speed optical transceiver chips for Cisco’s Acacia. Architecting CMOS circuits, layouts, measurements, and production designs in a hybrid team.

Responsibilities

Collaborate with Acacia mixed-signal engineers to provide optimized designs that integrate into the ASIC
Interact with digital/DSP design, system design, package design, and module design groups
Architect, design, lay out, measure, and productize ultra-deep sub-micron CMOS products
Lead efforts for a large block on a complex chip
Mentor team members and track deliverables
Participate in peer reviews of complex IC designs
Provide solid design methodology from conception to production
Collaborate with packaging and hardware design teams to meet signal and power integrity specifications
Develop high-speed AMS circuits and high-accuracy analog designs for optical communications products
Solve difficult problems and improve team effectiveness

Bachelor’s degree plus 8 years of related experience, or Master’s degree plus 6 years, or PhD plus 3 years
Experience designing, simulating, and measuring high-speed ICs in at least 3 listed areas
Experience with high-speed serial links using serializers, deserializers, and data converters
Experience modeling requirements for system link simulations
Experience with high-performance output drivers
Experience with high-performance phase-locked loops
Experience with efficient clock transmission/propagation
Experience with op-amps and programmable gain amplifiers
Experience with equalization techniques
Experience with electrical transceiver applications, including backplane and cable communications
Experience with FinFET and GAA technologies preferred
High-frequency layout experience, including floorplanning, power/ground and digital/analog signal routing, passive components, inductors, transformers, and transmission lines preferred
Experience in design for manufacturability, including PVT characterization, electromigration analysis, self-heating, and IR drop analysis preferred
Laboratory validation experience, including ESD practices/methodology and test setup construction preferred
Experience with Cadence Virtuoso, Spectre/APS/SpectreX, Virtuoso and Calibre layout validation tools, EMX, AMS mixed-signal simulations, and Matlab preferred
Ability to work three days per week from the Ottawa or Vancouver BC location

Medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
Paid parental leave
Short- and long-term disability coverage
Basic life insurance
Cisco restricted stock unit grants may be available
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation time per full calendar year for non-exempt employees
Flexible vacation time off program for exempt employees
80 hours of sick time off provided on hire date and each January 1st thereafter
Up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away for critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer
Annual bonuses for non-sales roles, subject to Cisco’s policies
Performance-based incentive pay for sales-plan employees
Opportunities to grow and build
Team collaboration and professional growth environment