About the role

PCB Layout Developer leading high-speed, multi-layer PCB design for ELITS, a technology transformation consultancy. Managing signal integrity, constraints, documentation, and multidisciplinary delivery.

Responsibilities

Lead and execute PCB layout activities for high-speed, multi-layer digital and mixed-signal boards
Apply and manage layout constraints using Cadence tools, particularly Allegro Constraint Manager (ACM)
Collaborate with digital designers to review and validate front-end constraints and schematics
Optimize component placement and routing for electrical performance, thermal efficiency, and mechanical requirements
Produce and maintain layout documentation, including Gerber files, assembly drawings, and fabrication outputs
Perform DRC and ERC checks and participate in design reviews
Work closely with multidisciplinary teams to align layout activities with system-level requirements and project timelines

Diploma or degree in Electrical Engineering, Electronics Technology, or a related field
Five or more years of experience in PCB layout design, preferably in telecom or embedded systems
Proficiency with Cadence layout tools, especially Allegro and Allegro Constraint Manager (ACM)
Strong understanding of high-speed design principles, impedance control, and EMI/EMC best practices
Experience reviewing and applying front-end design constraints
Solid knowledge of PCB materials, stack-up design, and manufacturability considerations
Familiarity with IPC standards and PCB fabrication processes
Experience with DDRx memory interfaces, SerDes technologies, and power distribution networks
Deep understanding of signal integrity (SI) and power integrity (PI), especially during early placement and routing planning
Ability to manage multiple layout projects and meet tight deadlines
Strong communication and documentation skills
Must be a Canadian resident or have a work permit in Canada