Principal Engineer verifying AI/HPC ASIC systems at Marvell. Leading verification efforts for complex SoCs and collaborating with global teams.

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Principal Engineer verifying AI/HPC ASIC systems at Marvell. Leading verification efforts for complex SoCs and collaborating with global teams.
Senior RF and Analog Design Engineer developing multi - tens of GHz transimpedance amplifiers for optical communication systems. Responsible for circuit design and validation in high - performance applications.