Analog/mixed - signal IC designer developing high - speed optical transceiver chips for Cisco’s Acacia. Architecting CMOS circuits, layouts, measurements, and production designs in a hybrid team.
About the role
- Internship in stress engineering at MHI RJ Aviation providing engineering solutions for regional aircraft. Collaborating with experts and contributing to real projects from day one.
Responsibilities
- Perform static and fatigue analyses to support product improvement
- Provide recommendations on design concepts and repair strategies for aircraft structures
- Develop calculation tools to support structural analyses
- Prepare certification reports supporting the analyses performed
Requirements
- 3rd-year student in mechanical or aeronautical engineering specializing in structures (stress)
- Familiarity with CATIA V5 and NASTRAN/PATRAN
- Proficiency with Microsoft Office
- Good English communication skills (spoken and written)
- Basic programming knowledge
Benefits
- Personalized training and mentoring
- Stimulating and rewarding work environment
Job title
Job type
Experience level
Salary
Not specified
Degree requirement
Location requirements
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