About the role

Senior Principal Embedded Software Architect leading HW/SW co-design, firmware strategy, and architecture teams. Shaping SoC and IP design at Analog Devices, a global semiconductor company.

Responsibilities

Direct, mentor, and manage the HW/SW co-design architecture team
Serve as the primary technical and operational interface with the Senior Director of HW/SW Co-Design
Translate group strategy into architectural roadmaps, milestone tracking, and progress reviews
Coordinate with digital design, analog, software, validation, and product management leads
Lead SoC co-architecture and hardware/software trade-off analysis
Translate customer use cases into quantitative system requirements
Assess data paths and co-define hardware accelerators to optimize software execution
Define and contribute to bootloader, initialization sequence, microcode, and kernel driver architecture
Champion hardware debuggability and observability using CoreSight, JTAG, and trace
Act as the technical voice for customer software teams
Ensure platform APIs and programming models remain intuitive and efficient
Drive software-first input into SoC and IP design before silicon exists

BS/MS in Electrical Engineering, Computer Engineering, or Computer Science
15+ years of system software architecture, firmware development, and HW/SW co-design experience
3+ years of direct engineering management or formal team leadership experience
Expert proficiency in C/C++ for low-level embedded software, bootloaders, and device drivers
Experience with RTOS (e.g., Zephyr) and Embedded Linux environments
Knowledge of memory hierarchies, AMBA AXI/AHB/APB bus interconnect protocols, DMA engines, and RISC-V/ARM architecture fundamentals
Hands-on experience with post-silicon bring-up and JTAG debugging
Experience reading/evaluating RTL (Verilog/SystemVerilog)
Preferred: experience scaling and structuring system architecture efforts within semiconductor or IP companies
Preferred: hands-on experience with SystemC (TLM 2.0) or transaction-level modeling
Preferred: familiarity with Renode, Virtualizer, or similar pre-silicon simulation platforms
Preferred: experience with Palladium, Zebu, FPGA prototyping, CI/CD, and Docker
Preferred: knowledge of mixed-signal architectures, signal processing accelerators, dynamic power management, and DVFS
Preferred: experience defining system-wide debug/trace infrastructure, logic analyzers, and performance modeling tools
Preferred: familiarity with TrustZone, secure boot, and cryptography accelerators
Applicants may be subject to export licensing review unless they are US Citizens, US Permanent Residents, or protected individuals