Lead Hardware Engineer focusing on designing PCB equipment for safety functions in reactor systems. Collaborating with vendors to meet production schedules and quality standards.
Responsibilities
Demonstrate accountability for cost, schedule, quality, and technical accuracy of assigned tasks
Work with vendors to ensure designs can be manufactured to required quality standards
Technical collaboration between design engineering and vendors when manufacturing issues arise
Work with the technical leader to establish an effective work plan, including time estimates, schedule estimates, requirements and work processes
Apply engineering fundamentals and 1st order engineering principles to establish and/or confirm expected performance
Provide clear and complete analysis documentation in accordance with GE engineering procedures
Manage time effectively to provide quality deliverables within the expected project timeline
Communicate effectively to leadership the status of work activities
Effectively manage multiple priorities
Requirements
Bachelor's degree in Mechanical, Electrical, or Computer Engineering from an accredited university or college
6 years of PCB design experience
2 years of experience in PCB board production methods and best practices
Eligibility for U.S. export-controlled information access
Experience in nuclear analog and digital instrumentation, control, monitoring, and electric power system and field engineering
Competency in industry standards: IEEE, IEC, IPC, and quality
Competency in modeling and test data collection tools
Strong technical writing skills with focus on requirements and design documents
Benefits
medical, dental, vision, and prescription drug coverage
access to Health Coach from GE Vernova, a 24/7 nurse-based resource
access to the Employee Assistance Program, providing 24/7 confidential assessment, counseling and referral services
GE Vernova Retirement Savings Plan, a tax-advantaged 401(k) savings opportunity with company matching contributions and company retirement contributions
access to Fidelity resources and financial planning consultants
Firmware Test Engineer testing and validating firmware for optical products with cross - functional teams. Building test automation and drivers from scratch in Nokia's Ottawa team.
Senior Firmware Engineer at Very, creating embedded firmware for Matter - enabled devices. Leading development from schematic to production certification while collaborating closely with hardware teams.
Senior Principal Firmware Engineer developing and implementing embedded firmware for advanced coherent optical systems at Nokia. Collaborating with cross - functional teams while mentoring junior engineers in an Agile environment.
Lead Hardware Engineer designing PCB equipment for safety critical functions in the BWRX - 300 reactor. Collaborating with vendors to ramp up suppliers for new PCB hardware product line.
Hardware Engineer responsible for designing and manufacturing PCB equipment for safety critical functions in small module reactors. Collaborating with vendors and internal teams, focusing on production schedules.
Senior Firmware Engineer developing proprietary low - power wireless products at HID. Engaging in embedded software design using C/C++ and assembler across microcontroller architectures.
Senior Digital Hardware Engineer responsible for defining digital hardware architecture for complex networking platforms. Leading hardware design and validation for multi - gigabit systems in Canada.
Lead Embedded Firmware Engineer developing production - grade firmware for Matter - enabled devices. Collaborating with hardware engineers and overseeing the firmware development lifecycle.
Director of Hardware Engineering driving innovative sensor hardware design, development, and R&D at SmartSkin Technologies. Leading and mentoring engineering teams to deliver high - performance products.
Senior Firmware Engineer developing embedded firmware for Matter - enabled devices at Very. Responsible for full device lifecycle and collaboration with cross - functional teams in a remote environment.