PCIe Senior/Lead Software Engineer at Arista Networks working on high-speed communication between hardware components. Collaborating with hardware, diagnostics, and software engineers to maximize PCIe bandwidth and reliability.
Responsibilities
Bringing up PCIe links on new hardware designs
Tuning PCIe parameters on root ports, bridges, and end points
Modifying the Linux PCI drivers and virtual memory allocation
Using AER and DPC to improve error visibility and resiliency
Developing userspace software that mediates between networking ASICs, FPGAs, and PCIe bridges
Measuring hardware read and write performance
Developing automated tests using C, C++ and Python to validate features
Requirements
8+ years fluency in C or C++
Python experience an added bonus
Solid understanding of PCIe hardware and software drivers
PCIe state machine, ltssm, tlp, credit flow control knowledge a plus
Significant hands-on experience diagnosing problems, troubleshooting issues, and fixing bugs in low-level firmware
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