Building Science Engineer supporting Stantec’s sustainable engineering and design projects. Conducting building envelope assessments, construction reviews, site visits, and field testing.
About the role
- Principal firmware engineer owning embedded connectivity software for Astera Labs’ rack-scale AI infrastructure. Designing, debugging, and validating Ethernet retimer and mixed-signal systems.
Responsibilities
- Own the embedded firmware stack from hardware abstraction and device drivers through management interfaces, diagnostics, and customer-facing APIs
- Design firmware for adaptive equalization, gain control, calibration, link training, PLL/CDR feedback, thermal management, and device telemetry
- Architect control algorithms, state machines, and tuning flows for analog and high-speed interfaces across process, voltage, and temperature variation
- Define software quality gates, validation criteria, and release practices from pre-silicon planning through production deployment
- Debug firmware across Ethernet configurations, link states, and failure modes by tracing Layer 1 PHY, SERDES, FEC/PCS, MAC, retimer, and gearbox interactions
- Investigate register accesses, embedded SDK behavior, link state machines, PHY telemetry, logs, and real-hardware measurements to identify root causes and deliver fixes
- Partner with system validation to develop test plans, automate characterization flows, and verify firmware across corner cases and product configurations
- Support customer bring-up, field issue triage, and deployment readiness with applications, platform, and silicon teams
- Set technical direction and lead architecture and tradeoff discussions
- Serve as technical authority for mixed-signal firmware, analog control behavior, Ethernet physical-layer debug, and hardware/software integration
- Lead design reviews, implementation, code reviews, and difficult debugging efforts across firmware, analog, silicon, systems, validation, and applications teams
- Mentor engineers and help build the team through recruiting, onboarding, and technical development
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
- 8–12 years of experience developing embedded firmware or software for resource-constrained systems, with ownership from architecture through production
- Strong embedded C/C++ skills and deep knowledge of microcontroller architecture, memory-mapped peripherals, interrupt handling, and bare-metal firmware
- Hands-on experience with Ethernet or high-speed connectivity devices, including Layer 1 PHYs, SERDES, retimers, gearboxes, NICs, switches, or related systems
- Solid understanding of physical-layer behavior, link state machines, register-level debug, and hardware/software integration
- Experience with feedback systems, adaptive algorithms, calibration, or tuning of analog or mixed-signal subsystems
- Proficiency with Microsoft-based development environments and Linux command-line tools, including GCC or Clang, Make, Bash, GDB, and Git
- Clear written and verbal communication, systematic debugging skills, and ability to operate effectively in a fast-moving environment with ambiguity
- Preferred: Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
- Preferred: Python experience for test automation, debug tooling, data analysis, or lab workflows; hands-on experience with Jenkins and CI/CD infrastructure
- Preferred: Familiarity with mixed-signal systems and analog signal paths, including ADC/DAC interfaces, sensor readout, transimpedance amplifiers, transmit drivers, CTLE/DFE equalization, CDR/PLL circuits, or thermal control
- Preferred: Experience with retimer or gearbox firmware, SDK/API development, optical modules or pluggable optics, high-speed copper connectivity, Ethernet PHY subsystems, FEC, PMA, or signal-integrity analysis
- Preferred: Experience using oscilloscopes, BERTs, logic analyzers, and other lab equipment; familiarity with FPGA emulation, pre-silicon validation, RTOS, device drivers, coroutines, mentoring, or recruiting
Benefits
- Discretionary bonus
- Incentives
- Benefits
- Occasional travel to Astera Labs’ San Jose headquarters, approximately twice per year
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