About the role

Hardware penetration tester assessing embedded and IoT devices for Packetlabs, a Canadian cybersecurity consultancy. Reverse engineering firmware, exploiting hardware interfaces, and advising clients on practical remediation.

Responsibilities

Plan and execute end-to-end hardware penetration tests on embedded and IoT devices against defined scope and rules of engagement
Identify, access, and exploit on-board debug interfaces such as JTAG, SWD, and UART
Extract firmware through debug ports, in-circuit flash reads, or chip-off and analyze it for vulnerabilities
Intercept and analyze embedded buses including SPI, I2C, UART, CAN, and USB
Perform side-channel analysis and fault injection where in scope
Reverse engineer firmware and embedded binaries to identify logic flaws, hardcoded secrets, and exploitable conditions
Assess physical attack surfaces, tamper resistance, and key/secret storage
Distinguish theoretical from operationally relevant risk
Write technical reports and present findings to technical and non-technical client stakeholders
Advise clients on practical, prioritized remediation
Build and maintain lab tooling, test rigs, and internal methodology
Contribute to research, responsible disclosure, and internal knowledge-sharing
Stay current on hardware attack techniques, embedded architectures, and defensive controls
Help raise the standard of hardware security work across the firm

Graduate of an Information Security, Computer Science, or Computer/Electrical Engineering degree program, or equivalent hands-on experience
Strong electronics fundamentals, including ability to read schematics and datasheets
Hands-on soldering ability, including surface-mount rework and basic chip removal
Demonstrated experience accessing JTAG, SWD, UART, and similar debug interfaces
Experience extracting firmware from real devices
Comfort using logic analyzers, oscilloscopes, and multimeters
Firmware reverse-engineering skills
Scripting proficiency in Python and enough C to read embedded code
Familiarity with ARM/Cortex-M, MIPS, AVR, and RISC-V architectures
Familiarity with RTOS and bare-metal concepts
Clear written and verbal communication
Ability to work with clients, project managers, and teammates
Side-channel or fault-injection experience, RF/wireless work, secure boot/TEE/secure element/HSM knowledge, PCB design familiarity, published CVEs, conference talks, CTF placements, open-source tooling, and relevant certifications are assets

Immediate and ongoing offensive security training, mentorship, and professional development
Competitive compensation and growth opportunity
Flexible work environment
Opportunity to shape the growth, direction, and methodology of Packetlabs' expanding hardware practice
Collaboration with a highly skilled team of security professionals