About the role

Sr. Staff Engineer verifying memory and AI/HPC subsystems for Marvell's advanced SOCs and IPs. Collaborating on functional verification architecture and test strategies with engineering teams.

Responsibilities

Work on verification of memory, AI/HPC or Die-2-Die subsystems of Marvell's AI/ML, Network processing, Compute, Memory Expander and Accelerated Compute SOCs and IPs
Contribute to the architecture for a functional verification environment
Contribute to or develop test strategies that will ensure functional correctness
Develop verification testplan and write tests using random techniques and coverage analysis
Debug failures and work with designers to resolve issues
Contribute to the development and future direction of SoC verification methodologies and environments

Bachelor’s degree in Electrical engineering, Electronics, Computer engineering, or related fields with 10+ years of experience
Master’s degree and/or PhD in Electrical engineering, Electronics, Computer engineering, or related fields with 8+ years of experience
8+ years of experience in design engineering with focus on verification
At least 5 years of direct hands-on verification experience on PCIe, NOC, DDR, HBM, Processor cores or AI or HPC accelerators at block, subsystem and full chip level contexts
Strong experience developing complex/random verification environments using System Verilog/UVM
Strong experience with writing and executing detailed verification test-plan
Strong experience with scripting languages such as Python or Perl and EDA verification tools
Strong experience with object-oriented design and implementation
Excellent communication skills to interface internally and externally with all levels of the organization
Demonstrates good analytical and problem-solving skills
Must have the ability to define problems, issues, and opportunities
Must have the ability to multi-task in a fast-paced environment